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 Provides an overview of the physical basis of noise in semiconductor devices, and a detailed treatment of numerical noise simulation in small-signal conditions. It presents innovative developments in the noise simulation of semiconductor devices operating in large-signal quasi-periodic conditions.

 Low dielectric materials are an important component of microelectronic devices. In this carefully edited volume the leading researchers give an introduction to and a survey of the various fields of dielectrics for IC integration. The book appeals to materials reserachers, electrical engineers and advanced students.

 This book provides a rather comprehensive presentation of the physics and modeling of high-frequency bipolar transistors with particular emphasis given to silicon-based devices. I hope it will be found useful by those who do as well as by those who intend to work in the field, as it compiles and extends material presented in numerous publications in a coherent fashion. I've worked on this project for years and did my best to avoid errors. De spite all efforts it is possible that "something" has been overlooked during copy-editing and proof-reading. If you find a mistake please let me know. Michael Reisch Kempten, December 2002 Notation It is intended here to use the most widely employed notation, in cases where the standard textbook notation is different from the SPICE notation, the latter is used. In order to make formulas more readable, model parameters represented in SPICE by a series of capital letters are written here as one capital letter with the rest in the form of a subscript (e.g. XCJC is used here instead of the XCJC used in the SPICE input). Concerning the use of lower-case and capital letters, the following rules are applied: • Time-dependent large-signal quantities are represented by lower-case let ters. The variables 't, v and p therefore denote time-dependent current, voltage and power values.

 System-on-a-chip (SoC) designs result in a wide range of high-complexity, high-value semiconductor products. As the technology scales towards smaller feature sizes and chips grow larger, a speed limitation arises due to an in creased RC delay associated with interconnection wires. Innovative circuit techniques are required to achieve the speed needed for high-performance signal processing. Current sensing is considered as a promising circuit class since it is inherently faster than conventional voltage sense amplifiers. How ever, especially in SRAM, current sensing has rarely been used so far. Practi cal implementations are challenging because they require sophisticated analog circuit techniques in a digital environment. The objective of this book is to provide a systematic and comprehen sive insight into current sensing techniques. Both theoretical and practical aspects are covered. Design guidelines are derived by systematic analysis of different circuit principles. Innovative concepts like compensation of the bit line multiplexer and auto-power-down will be explained based on theory and experimental results. The material will be interesting for design engineers in industry as well as researchers who want to learn about and apply current sensing techniques. The focus is on embedded SRAM but the material presented can be adapted to single-chip SRAM and to any other current-providing memory type as well. This includes emerging memory technologies like magnetic RAM (MRAM) and Ovonic Unified Memory (OUM). Moreover, it is also applicable to array like structures such as CMOS camera chips and to circuits for signal trans mission along highly capacitive busses.

 This book is the result of a long friendship, of a broad international co operation, and of a bold dream. It is the summary of work carried out by the authors, and several other wonderful people, during more than 15 years, across 3 continents, in the course of countless meetings, workshops and discus sions. It shows that neither language nor distance can be an obstacle to close scientific cooperation, when there is unity of goals and true collaboration. When we started, we had very different approaches to handling the mys terious, almost magical world of asynchronous circuits. Some were more theo retical, some were closer to physical reality, some were driven mostly by design needs. In the end, we all shared the same belief that true Electronic Design Automation research must be solidly grounded in formal models, practically minded to avoid excessive complexity, and tested "in the field" in the form of experimental tools. The results are this book, and the CAD tool petrify. The latter can be downloaded and tried by anybody bold (or desperate) enough to tread into the clockless (but not lawless) domain of small-scale asynchronicity. The URL is http://www.lsi. upc. esr j ordic/petrify. We believe that asynchronous circuits are a wonderful object, that aban dons some of the almost militaristic law and order that governs synchronous circuits, to improve in terms of simplicity, energy efficiency and performance.

 To push MOSFETs to their scaling limits and to explore devices that may complement or even replace them at molecular scale, a clear understanding of device physics at nanometer scale is necessary. Nanoscale Transistors provides a description on the recent development of theory, modeling, and simulation of nanotransistors for electrical engineers, physicists, and chemists working on nanoscale devices. Simple physical pictures and semi-analytical models, which were validated by detailed numerical simulations, are provided for both evolutionary and revolutionary nanotransistors. After basic concepts are reviewed, the text summarizes the essentials of traditional semiconductor devices, digital circuits, and systems to supply a baseline against which new devices can be assessed. A nontraditional view of the MOSFET using concepts that are valid at nanoscale is developed and then applied to nanotube FET as an example of how to extend the concepts to revolutionary nanotransistors. This practical guide then explore the limits of devices by discussing conduction in single molecules

 Starting with the simplest semiclassical approaches and ending with the description of complex fully quantum-mechanical methods for quantum transport analysis of state-of-the-art devices, Computational Electronics: Semiclassical and Quantum Device Modeling and Simulation provides a comprehensive overview of the essential techniques and methods for effectively analyzing transport in semiconductor devices. With the transistor reaching its limits and new device designs and paradigms of operation being explored, this timely resource delivers the simulation methods needed to properly model state-of-the-art nanoscale devices. The first part examines semiclassical transport methods, including drift-diffusion, hydrodynamic, and Monte Carlo methods for solving the Boltzmann transport equation. Details regarding numerical implementation and sample codes are provided as templates for sophisticated simulation software. The second part introduces the density gradient method, quantum hydrodynamics, and the concept of effective potentials used to account for quantum-mechanical space quantization effects in particle-based simulators. Highlighting the need for quantum transport approaches, it describes various quantum effects that appear in current and future devices being mass-produced or fabricated as a proof of concept. In this context, it introduces the concept of effective potential used to approximately include quantum-mechanical space-quantization effects within the semiclassical particle-based device simulation scheme. Addressing the practical aspects of computational electronics, this authoritative resource concludes by addressing some of the open questions related to quantum transport not covered in most books. Complete with self-study problems and numerous examples throughout, this book supplies readers with the practical understanding required to create their own simulators.

 The aim of this book is to highlight the benefits of a higher interoperability between Technology Computer-Aided Design and Electronic Design Automation, focusing on specifically selected open source tools for compact modeling. Due to the tremendous developments in semiconductor technology in recent years, device level modelling and integrated circuit design have become intimately related. However, they have been traditionally disconnected up to the circuit level. This book consists of a set of extended user manuals guiding the reader from the usual software, from multidimensional numerical process and device simulations, through compact model development and its Verilog-A standardization to carefully selected IC designs for analog, radio frequency and digital applications. Bringing together contributions from academic and industrial researchers and engineers, the book forms a valuable reference for students and those working in the field.

 "The book comprehensively covers all the current and the emerging areas of the physics and the technology of high permittivity gate dielectric materials, including, topics such as MOSFET basics and characteristics, hafnium-based gate dielectric materials, Hf-based gate dielectric processing, metal gate electrodes, flat-band and threshold voltage tuning, channel mobility, high-k gate stack degradation and reliability, lanthanide-based high-k gate stack materials, ternary hafnia and lanthania based high-k gate stack films, crystalline high-k oxides, high mobility substrates, and parameter extraction. Each chapter begins with the basics necessary for understanding the topic, followed by a comprehensive review of the literature, and ultimately graduating to the current status of the technology and our scientific understanding and the future prospects." .

 This volume presents the application of the Monte Carlo method to the simulation of semiconductor devices, reviewing the physics of transport in semiconductors, followed by an introduction to the physics of semiconductor devices.

 Increasing performance demands in integrated circuits, together with limited energy budgets, force IC designers to find new ways of saving power. One innovative way is the presented adaptive voltage scaling scheme, which tunes the supply voltage according to the present process, voltage and temperature variations as well as aging. The voltage is adapted “on the fly” by means of in-situ delay monitors to exploit unused timing margin, produced by state-of-the-art worst-case designs. This book discusses the design of the enhanced in-situ delay monitors and the implementation of the complete control-loop comprising the monitors, a control-logic and an on-chip voltage regulator. An analytical Markov-based model of the control-loop is derived to analyze its robustness and stability. Variation-Aware Adaptive Voltage Scaling for Digital CMOS Circuits provides an in-depth assessment of the proposed voltage scaling scheme when applied to an arithmetic and an image processing circuit. This book is written for engineers interested in adaptive techniques for low-power CMOS circuits.

 The focus of this book is on modeling and simulations used in research on the morphological evolution during film growth. The authors emphasize the detailed mathematical formulation of the problem. The book will enable readers themselves to set up a computational program to investigate specific topics of interest in thin film deposition. It will benefit those working in any discipline that requires an understanding of thin film growth processes.

 This book offers combined views on silicon-on-insulator (SOI) nanoscaled electronics from experts in the fields of materials science, device physics, electrical characterization and computer simulation. Coverage analyzes prospects of SOI nanoelectronics beyond Moore’s law and explains fundamental limits for CMOS, SOICMOS and single electron technologies.

 This book deals with the challenge of exploiting ambient vibrational energy which can be used to power small and low-power electronic devices, e.g. wireless sensor nodes. Generally, particularly for low voltage amplitudes, low-loss rectification is required to achieve high conversion efficiency. In the special case of piezoelectric energy harvesting, pulsed charge extraction has the potential to extract more power compared to a single rectifier. For this purpose, a fully autonomous CMOS integrated interface circuit for piezoelectric generators which fulfills these requirements is presented. Due to these key properties enabling universal usage, other CMOS designers working in the field of energy harvesting will be encouraged to use some of the shown structures for their own implementations. The book is unique in the sense that it highlights the design process from scratch to the final chip. Hence, it gives the designer a comprehensive guide of how to (i) setup an appropriate harvester model to get realistic simulation results, (ii) design the integrated circuits for low power operation, (iii) setup a laboratory measurement environment in order to extensively characterize the chip in combination with the real harvester and finally, (iv) interpret the simulation/measurement results in order to improve the chip performance. Since the dimensions of all devices (transistors, resistors etc.) are given, readers and other designers can easily re-use the presented circuit concepts.